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this is information on a product in full production. september 2013 doc id 022473 rev 6 1/37 1 vnd5e050aso-e double channel high-side driver with analog current sense for automotive applications datasheet ? production data features general ? inrush current active management by power limitation ? very low standby current ? 3.0 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromagnetic susceptibility ? compliant with european directive 2002/95/ec ? very low current sense leakage ? aec-q100 qualified diagnostic functions ? proportional load current sense ? high current sense precision for wide currents range ? current sense disable ? off-state open-load detection ? output short to v cc detection ? overload and short to ground (power limitation) indication ? thermal shutdown indication protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? overtemperature shutdown with auto restart (thermal shutdown) ? reverse battery protected ? electrostatic discharge protection applications all types of resistive, inductive and capacitive loads suitable as led driver description the vnd5e050aso-e is a double channel high- side driver manufactured using st proprietary vipower ? m0-5 technology and housed in so-16l package. the device is designed to drive 12 v automotive grounded loads, and to provide protection and diagnostics. it also implements a 3 v and 5 v cmos-compatible interface for the use with any microcontroller. the device integrates advanced protective functions such as load current limitation, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and overvoltage active clamp. a dedicated analog current sense pin is associated with every output channel providing enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication, overtemperature indication, short-circuit to v cc diagnosis and on- state and off-state open-load detection. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to share the external sense resistor with similar devices. max transient supply voltage v cc 41 v operating voltage range v cc 4.5 to 28 v max on-state resistance (per ch.) r on 50 m current limitation (typ) i limh 27 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. ("1($'5 so-16l www.st.com
contents vnd5e050aso-e 2/37 doc id 022473 rev 6 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 24 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 25 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 3.4.1 short to vcc and off-state open-load detection . . . . . . . . . . . . . . . . . . 26 3.5 maximum demagnetization energy (vcc = 13.5v) . . . . . . . . . . . . . . . . . 28 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1 so-16l thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 ecopack ? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
vnd5e050aso-e list of tables doc id 022473 rev 6 3/37 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13 v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. current sense (8 v < v cc < 18 v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. open load detection (8 v < v cc < 18 v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 13. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 14. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 15. thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 16. so-16l mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 17. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 18. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
list of figures vnd5e050aso-e 4/37 doc id 022473 rev 6 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 5. open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. delay response time between rising edge of output current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. i out /i sense vs i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 11. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 12. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 14. off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 15. short to v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 16. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 17. off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 18. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 19. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 20. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 21. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 22. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 23. on-state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 24. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 25. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 26. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 27. ilimh vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 28. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 29. cs_dis high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 30. cs_dis clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 31. cs_dis low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 32. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 33. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 34. maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28 figure 35. so-16l pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 36. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29 figure 37. so-16l thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 38. thermal fitting model of a single channel hsd in so-16l . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 39. so-16l package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 40. so-16l tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 41. so-16l tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
vnd5e050aso-e block diagram and pin description doc id 022473 rev 6 5/37 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection. output 1,2 power output. gnd ground connection. must be reverse battery protected by an external diode/resistor network. input 1,2 voltage controlled input pin with hysteresis, cmos compatible. controls output switch state. current sense 1,2 analog current sense pin, delivers a current proportional to the load current. cs_dis active high cmos compatible pin, to disable the current sense pin. v cc ch 1 control & diagnostic 1 logic driver v on limitation current limitation power clamp off state open load over temp. undervoltage v senseh current sense ch 2 overload protection (active power limitation) in1 in2 cs1 cs2 cs_ dis gnd out2 out1 signal clamp control & diagnostic channels 2
block diagram and pin description vnd5e050aso-e 6/37 doc id 022473 rev 6 figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating not allowed x x x x to ground through 1 k resistor x through 22 k resistor through 10 k resistor through 10 k resistor 9ff 9ff 9ff 9ff 287387 287387 287387 287387 287387 287387 *1' ,1387 ,1387 &6(16( &6(16( &6',6 ("1($'5
vnd5e050aso-e electrical specifications doc id 022473 rev 6 7/37 2 electrical specifications figure 3. current and voltage conventions note: v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in table 3: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to the conditions in table below for extended periods may affect device reliability. i s i gnd v cc v cc v sense2 output1 i out1 current i sense1 input1 i in1 v in2 v out2 gnd cs_dis i csd v csd input2 i in2 v in1 sense1 output2 i out2 current i sense2 sense2 v sense1 v out1 v fn table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 20 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc - 41 to +v cc v
electrical specifications vnd5e050aso-e 8/37 doc id 022473 rev 6 2.2 thermal data 2.3 electrical characteristics values specified in this section are for 8 v vnd5e050aso-e electrical specifications doc id 022473 rev 6 9/37 table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4.5 13 28 v v usd undervoltage shutdown 3.5 4.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on-state resistance (1) 1. for each channel. i out =2a; t j =25c 50 m i out =2a; t j = 150c 100 i out =2a; v cc =5v; t j =25c 65 v clamp clamp voltage i s =20ma 41 46 52 v i s supply current off-state; v cc =13v; t j =25c; v in =v out =v sense =v csd =0v 2 (2) 2. powermos leakage included. 5 (2) a on-state; v cc =13v; v in =5v; i out =0a 36ma i l(off1) off-state output current (1) v in =v out =0v; v cc =13v; t j =25c 00.013 a v in =v out =0v; v cc =13v; t j =125c 05 v f output - v cc diode voltage (1) -i out = 4 a; t j = 150c 0.7 v table 6. switching (v cc =13v; t j = 25c) symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time r l =6.5 (see figure 6 )? 20 ? s t d(off) turn-off delay time r l =6.5 (see figure 6 )? 45 ? s dv out /dt (on) turn-on voltage slope r l =6.5 ? see figure 26 ?v / s dv out /dt (off) turn-off voltage slope r l =6.5 ? see figure 28 ?v / s w on switching energy losses during t won r l =6.5 (see figure 6 )? 0.15 ? mj w off switching energy losses during t woff r l =6.5 (see figure 6 )? 0.3 ? mj table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 0.9 v i il low level input current v in =0.9v 1 a
electrical specifications vnd5e050aso-e 10/37 doc id 022473 rev 6 v ih input high level voltage 2.1 v i ih high level input current v in =2.1v 10 a v i(hyst) input hysteresis voltage 0.25 v v icl input clamp voltage i in =1ma 5.5 7 v i in =-1ma -0.7 v csdl cs_dis low level voltage 0.9 v i csdl low level cs_dis current v csd =0.9v 1 a v csdh cs_dis high level voltage 2.1 v i csdh high level cs_dis current v csd =2.1v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis clamp voltage i csd =1ma 5.5 7 v i csd =-1ma -0.7 table 8. protections and diagnostics (1) 1. to ensure long term reliability under heavy overload or short circuit conditions , protection and related diagnostic signals must be used together with a proper so ftware strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13 v 19 27 38 a 5v < v cc <28v 38 a i liml short circuit current during thermal cycling v cc =13v; t r vnd5e050aso-e electrical specifications doc id 022473 rev 6 11/37 table 9. current sense (8 v < v cc <18v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out = 0.05 a; v sense =0.5v; v csd =0v; t j = -40c...150c 1440 2250 3630 k 1 i out /i sense i out = 1 a; v sense =4v; v csd =0v; t j = -40c...150c t j = 25c...150c 1740 1750 2070 2070 2820 2562 dk 1 /k 1 (1) current sense ratio drift i out = 1 a; v sense =4v; v csd =0v; t j = -40 c to 150 c -15 15 % k 2 i out /i sense i out = 2 a; v sense =4v; v csd =0v; t j = -40c...150c t j = 25c...150c 1900 1899 2000 2000 2395 2282 dk 2 /k 2 (1) current sense ratio drift i out = 2 a; v sense =4 v; v csd =0v; t j = -40 c to 150 c -9 9 % k 3 i out /i sense i out = 4 a; v sense =4v;v csd =0v; t j = -40c...150c t j = 25c...150c 1969 1950 1990 1990 2210 2153 dk 3 /k 3 (1) current sense ratio drift i out = 4 a; v sense =4 v; v csd =0v; t j = -40 c to 150 c -6 6 % i sense0 analog sense leakage current i out = 0 a; v sense =0v; v csd =5v; v in =0v; t j = -40c...150c 01 a i out = 0 a; v sense =0v; v csd =0v; v in =5v; t j = -40c...150c 02 i out = 2 a; v sense =0v; v csd =5v; v in =5v; t j = -40c...150c 01 i ol open load on-state current detection threshold v in =5v; 8v electrical specifications vnd5e050aso-e 12/37 doc id 022473 rev 6 t dsense1h delay response time from falling edge of cs_dis pin v sense <4v; 0.5a vnd5e050aso-e electrical specifications doc id 022473 rev 6 13/37 figure 4. current sense delay characteristics figure 5. open-load off-state delay timing figure 6. switching characteristics sense current input load current cs_dis t dsense2h t dsense2l t dsense1l t dsense1h v in v cs t dstkon output stuck to v cc v out > v ol v senseh v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff
electrical specifications vnd5e050aso-e 14/37 doc id 022473 rev 6 figure 7. delay response time between rising edge of output current and rising edge of current sense (cs enabled) figure 8. output voltage drop limitation v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax t dsense2h t t t v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t)
vnd5e050aso-e electrical specifications doc id 022473 rev 6 15/37 figure 9. i out /i sense vs i out figure 10. maximum current sense ratio drift vs load current note: parameter guaranteed by design; it is not tested. 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 11,522,533,54 i out (a) i out / i sense max tj = -40 c to 150 c max tj = 25 c to 150 c min tj = 25 c to 150 c min tj = -40 c to 150 c typical value -20 -15 -10 -5 0 5 10 15 20 1234 i out (a) dk/k(%)
electrical specifications vnd5e050aso-e 16/37 doc id 022473 rev 6 table 11. truth table conditions input output sense (v csd =0v) (1) 1. if the v csd is high, the sense output is at a high impedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short circuit to gnd (power limitation) l h l l 0 v senseh open load off-state (with external pull-up) lhv senseh short circuit to v cc (external pull-up disconnected) l h h h v senseh < nominal negative output voltage clamp ll0
vnd5e050aso-e electrical specifications doc id 022473 rev 6 17/37 table 12. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75v -100v 5000 pulses 0.5s 5s 2 ms, 10 2a +37v +50v 5000 pulses 0.2s 5s 50s, 2 3a -100v -150v 1h 90ms 100ms 0.1s, 50 3b +75v +100v 1h 90ms 100ms 0.1s, 50 4 -6v -7v 1 pulse 100ms, 0.01 5b (2) 2. valid in case of external load dum p clamp: 40v maximum referred to ground. +65v +87v 1 pulse 400ms, 2 table 13. electrical transient requirements (part 2) iso 7637-2: 2004e test pulse test level results iii vi 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dum p clamp: 40v maximum referred to ground. cc table 14. electrical transient requirements (part 3) class contents c all functions of the device performed as designed after exposure to disturbance. e one or more functions of the device did not perform as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
electrical specifications vnd5e050aso-e 18/37 doc id 022473 rev 6 2.4 waveforms figure 11. normal operation figure 12. overload or short to gnd i out v sense v cs_dis input nominal load nominal load normal operation power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling overload or short to gnd
vnd5e050aso-e electrical specifications doc id 022473 rev 6 19/37 figure 13. intermittent overload figure 14. off-state open-load with external circuitry i out v sense v cs_dis input i limh > nominal load intermittent overload i liml > overload v senseh > input off-state open load with external circuitry v ol i out v sense v cs_dis v out v out > v ol t dstk(on) v senseh >
electrical specifications vnd5e050aso-e 20/37 doc id 022473 rev 6 figure 15. short to v cc figure 16. t j evolution in overload or short to gnd t dstk(on) v out > v ol resistive short to v cc hard short to v cc short to v cc i out v cs_dis v out v ol t dstk(on) t tsd t r t j evolution in overload or short to gnd i limh > < i liml t j_start t hyst power limitation self-limitation of fast thermal transients input i out t j
vnd5e050aso-e electrical specifications doc id 022473 rev 6 21/37 2.5 electrical characteristics curves figure 17. off-state output current figure 18. high level input current -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 iloff (na) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iih (a) vin=2.1v figure 19. input clamp voltage figure 20. input low level -50 -25 0 25 50 75 100 125 150 175 tc (c) 5 5,2 5,4 5,6 5,8 6 6,2 6,4 6,6 6,8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 vil (v) figure 21. input high level figure 22. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1 vihyst (v)
electrical specifications vnd5e050aso-e 22/37 doc id 022473 rev 6 figure 23. on-state resistance vs t case figure 24. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 ron (mohm) iout= 2a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 0 20 40 60 80 100 ron (mohm) tc=-40c tc=25c tc=125c tc=150c figure 25. undervoltage shutdown figure 26. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt )on (v/ms) vcc=13v ri=6.5 ohm figure 27. i limh vs t case figure 28. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 10 15 20 25 30 35 40 ilimh (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 600 (dvout/dt )off (v/ms) vcc=13v ri= 6.5 ohm
vnd5e050aso-e electrical specifications doc id 022473 rev 6 23/37 figure 29. cs_dis high level voltage figure 30. cs_dis clamp voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 vcsdcl(v) icsd = 1 ma figure 31. cs_dis low level voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 vcsdl (v)
application information vnd5e050aso-e 24/37 doc id 022473 rev 6 3 application information figure 32. application schematic note: channel 2 has the same internal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two solutions to implement a ground protection network against reverse battery. 3.1.1 solution 1: resistor in the ground line (r gnd only) this can be used with any type of load. the following description shows an indication on how to size the r gnd resistor. 1. r gnd 600mv / (i s(on)max ) 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: p d = (-v cc ) 2 /r gnd this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in case of several high-side drivers sharing the same r gnd . v cc gnd output d gnd r gnd d ld cu +5v v gnd cs_dis input r prot r prot current sense r sense r prot c ext
vnd5e050aso-e application information doc id 022473 rev 6 25/37 if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st suggests to utilize section 3.1.2: solution 2: diode (dgnd) in the ground line . 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd =1k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network will produce a shift ( 600 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift does not vary if more than one hsd share the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line which are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins are pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/o pins from latching-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: -v ccpeak /i latchup r prot (v oh c -v ih -v gnd ) / i ihmax calculation example: for v ccpeak = - 100v and i latchup 20ma; v ohc 4.5v 5k r prot 180k recommended values: r prot =10k , c ext = 10nf. 3.4 current sense and diagnostic the current sense pin performs a double function (see figure 33: current sense and diagnostic ): current mirror of the load current in normal operation, delivering a current proportional to the load current according to a known ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5v minimum (see parameter v sense in table 9: current sense (8 v < v cc <18v) ). the current sense accuracy depends on the output current (refer to current sense electrical
application information vnd5e050aso-e 26/37 doc id 022473 rev 6 characteristics table 9: current sense (8 v < v cc <18v) ). diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to table 11: truth table ): ? power limitation activation ? overtemperature ? short to v cc in off-state ? open-load in off-state with additional external components. a logic level high on the cs_dis pin simultaneously sets all the current sense pins of the device in a high impedance state, thus disabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontroller analog inputs by sharing the sense resistance and adc line among different devices. figure 33. current sense and diagnostic 3.4.1 short to v cc and off-state open-load detection short to v cc a short circuit between v cc and output is indicated by the relevant current sense pin set to v senseh during the device off-state. little or no current is delivered by the current sense during the on-state depending on the nature of the short circuit. off-state open load with external circuitry detection of an open-load in off mode requires an external pull-up resistor (r pu ) connecting the output to a positive supply voltage (v pu ). main mosn 41v outn i loff2r r sense r prot to uc adc r pd r pu v pu pwr_lim v sense pu_cmd overtemperature ol off + - v ol current sensen i out /k x i senseh v bat i loff2f v senseh load inputn v cc gnd cs_dis
vnd5e050aso-e application information doc id 022473 rev 6 27/37 it is preferable that v pu is switched off during the module standby mode to avoid an increase in overall standby current consumption in normal conditions, that is, when the load is connected. an external pull-down resistor (r pd ) connected between output and gnd is mandatory to avoid misdetection in case of floating outputs in off-state (see figure 33: current sense and diagnostic ). r pd must be selected in order to ensure v out < v olmin unless pulled up by the external circuitry: r pd 22 k is recommended. for proper open load detection in off-state, the external pull-up resistor must be selected according to the following formula: for the values of v olmin ,v olmax , i l(off2)r and i l(off2)f see table 10: open load detection (8 v < v cc <18v) . v v i r v ol f off l pd off up pull out 2 min ) 2 ( _ = < ? = ? v v r r i r r v r v ol pd pu r off l pd pu pu pd on up pull out 4 max ) 2 ( _ = > + ? ? ? ? = ?
application information vnd5e050aso-e 28/37 doc id 022473 rev 6 3.5 maximum demagnetization energy (v cc = 13.5v) figure 34. maximum turn-off current versus inductance (for each channel) note: values are generated with r l =0 . in case of repetitive pulses, t jstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves a and b. 1 10 100 0,1 1 10 100 l (mh) i (a) c: t jstart = 125c repetitive pulse a: t jstart = 150c single pulse b: t jstart = 100c repetitive pulse demagnetization demagnetization demagnetization t v in , i l a b c
vnd5e050aso-e package and pcb thermal data doc id 022473 rev 6 29/37 4 package and pcb thermal data 4.1 so-16l thermal data figure 35. so-16l pc board note: layout condition of rth and zth measurements (pcb: double layer, thermal vias, fr4 area = 77 mm x 86 mm, pcb thickness = 1.6 mm, cu thickness = 70 m (front and back side), copper areas: from minimum pad lay-out to 8 cm2). figure 36. r thj-amb vs pcb copper area in open box free air condition ("1($'5 57+mdpe 57+mdpe '!0'2)
package and pcb thermal data vnd5e050aso-e 30/37 doc id 022473 rev 6 figure 37. so-16l thermal impedance junction ambient single pulse equation 1: pulse calculation formula where =t p /t figure 38. thermal fitting model of a single channel hsd in so-16l (a) a. the fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cyc ling during thermal shutdown) are not triggered. 7l p hv =7+?&: &x fp &x fp &x irrwsulqw '!0'2) z th r th z thtp 1 ? () + ? = '!0'2)
vnd5e050aso-e package and pcb thermal data doc id 022473 rev 6 31/37 table 15. thermal parameter area/island (cm 2 )footprint28 r1 (c/w) 0.7 r2 (c/w) 2.1 r3 (c/w) 4 r4 (c/w) 8 6 6 r5 (c/w) 14 13 13 r6 (c/w) 28 20 14.5 r7 (c/w) 0.7 r8 (c/w) 2.1 c1 (w.s/c) 0.001 c2 (w.s/c) 0.005 c3 (w.s/c) 0.1 c4 (w.s/c) 0.5 c5 (w.s/c) 1 1.5 1.5 c6 (w.s/c) 3 9 12 c7 (w.s/c) 0.001 c8 (w.s/c) 0.005
package information vnd5e050aso-e 32/37 doc id 022473 rev 6 5 package information 5.1 ecopack ? packages in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 package mechanical data figure 39. so-16l package dimensions ("1($'5
vnd5e050aso-e package information doc id 022473 rev 6 33/37 table 16. so-16l mechanical data symbol millimeters min typ max a 2.35 2.65 a1 0.10 0.30 b 0.33 0.51 c 0.23 0.32 d 10.10 10.50 e 7.40 7.60 e1.27 h 10.00 10.65 h 0.25 0.75 l 0.40 1.27 k0 8 ddd 0.10
package information vnd5e050aso-e 34/37 doc id 022473 rev 6 5.3 packing information figure 40. so-16l tube shipment (no suffix) figure 41. so-16l tape and reel shipment (suffix ?tr?) !lldimensio nsareinmm "ase1ty "ul k 1 ty 4u bele n gth? ! " #? ! # " ("1($'5
vnd5e050aso-e order codes doc id 022473 rev 6 35/37 6 order codes table 17. device summary package order codes tube tape and reel so-16l vnd5e050aso-e VND5E050ASOTR-E
revision history vnd5e050aso-e 36/37 doc id 022473 rev 6 7 revision history table 18. document revision history date revision changes 10-nov-2011 1 initial release. 19-dec-2011 2 updated figure 2 . 15-mar-2012 3 added section 4: package and pcb thermal data and update table 5 . 26-june-2012 4 update table 4: thermal data . 25-sep-2012 5 update table 4: thermal data . 18-sep-2013 6 updated disclaimer.
vnd5e050aso-e doc id 022473 rev 6 37/37 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statem ents and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or register ed trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - swed en - switzerland - united kingdom - united states of america www.st.com

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